Display devices operate on graphics architectures, known to those skilled in the art, based on integrated logic circuits of the FPGA, “Field Programmable Gate Array” type or of the ASIC, “Application Specific Integrated Circuit” type. These components, called GPUs (“Graphical Processor Units”), are integrated circuits dedicated to the graphical generation performing functions of generating basic graphics shapes such as a triangle, a line or a dot. These shapes are called primitives. The GPUs are usually accompanied by frame memory, today usually of the DDR (“Double Data Rate”) type, which contains the pixels that are displayed on the screen. It is in this buffer memory that they are saved just before being displayed on the screen. In this type of architecture, all the images are obliged to be transferred from the GPU to the memory. The hardware architectures now support high data rates allowing the generation of streams of images of better quality and of greater size.
However, the aviation field is subject to extremely severe standards of reliability of the electronic circuits. The electronic components must usually demonstrate an error probability rate of less than 1.10-9 per hour of flight. That is why the architectures used in this field do not operate the electronic systems up to the limit of technological performances. The designers rather seek to optimize the applications from the safety point of view by limiting the bandwidth requirements. The usual problem is therefore to surpass this limitation in bandwidth between the GPU and the frame memory for the graphics generation functions.
A system for generating synthetic images, that is to say that the images are made up of primitives, consists of at least two sub-functions: a function of generating the image, which consists in writing in a dedicated memory space the information specific to each pixel, and a function of displaying the image, which consists in rereading the information specific to each pixel in order to drive a video device.
GPUs usually work with several frame memory spaces, typically two, called pages. When one page is used by the display function, the other page is available for the function of generating the image. These pages may be physical, that is to say distributed over distinct hardware resources, or logical, that is to say distributed over common hardware resources. The logical pages are very largely preferred today because they are more economical in hardware resources. The result of this is that the memory bandwidth has to be shared between the function for generating the image and the function for displaying the image. In addition, any generation of an image must also begin with a complete erasure.
There are many techniques, based on buffer memories, which make it possible to reduce the memory bandwidth necessary to generate the image. However, these techniques are ineffective for the display and erase function because the frame memory is accessed linearly and in its totality. Buffer memories incorporated in GPUs provide greater data rates than frame memories, but they are limited in capacity and therefore do not make it possible to replace frame memories.
The major problem unresolved by the prior art is that the memory bandwidth necessary for a graphics system is not proportional to the complexity of the image generated. Usually, for aviation applications, the images are mostly composed of a black or transparent background depending on whether the type of display is based on liquid crystal screens or on holographic projections. The image usually comprises simple symbols as in the example of the displays of flight plans or of flight function interfaces.
FIG. 1 represents an image consisting mainly of a few symbols in black pixels on a uniform background; only 1.44% of memory reads and writes are used for the trace. The method for generating an image consists in carrying out initially a complete erasure of the frame memory, then the function of generating the image and then the function of displaying the image. In this example according to FIG. 2, the function of generating the image gains access to the frame memory 1 in normal mode, that is to say pixel by pixel, in order to write the information relating to each pixel.
In the example of FIG. 1, the image comprises 110 pixels 12 containing an item of information and the other pixels 11 represent the background of the image. According to FIG. 2, when the graphics generation unit 4 performs the erasure function “ERASE” and that of displaying the image “DISPLAY”, the frame memory 1 must be accessed in totality and linearly in order to read all of the pixels of the image and drive the screen 6. For the trace of the image in the memory 1, the function “GENERATE” writes only the pixels 12 in the memory 1. For the image according to FIG. 1, the total in quantity of data for the transfer between the GPU and the frame memory in order to generate an image is:                erase: 64×48=3072 pixels        trace: 110 pixels        display function: 64×48=3072 pixelsnamely a total number of words accessed per frame of 6254.        